| Records |
Author  |
Jacobsen, R.H.; Mikkelsen, S.A. |
| Title |
Infrastructure for Intelligent Automation Services in the Smart Grid |
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| Year |
2014 |
Publication |
Wireless Personal Communications |
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| Volume |
76 |
Issue |
2 |
Pages |
125-147 |
| Keywords |
Home area network; Smart energy profile; Intelligent automation services; Smart grid |
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Springer US |
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0929-6212 |
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| Call Number |
UNIROMA1 @ davi @ JacMik14 |
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41 |
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| Author |
Jacobsen, R.H.; Mikkelsen, S.A.; Rasmussen, N.H. |
| Title |
Towards the Use of Pairing-Based Cryptography for Resource-Constrained Home Area Networks |
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2015 |
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Digital System Design (DSD), 2015 Euromicro Conference on |
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233-240 |
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Authentication;Elliptic curve cryptography;Logic gates;Prototypes;constrained devices;home area network;identity-based cryptography;network bootstrap;pairing-based cryptography;security |
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UNIROMA1 @ davi @ ref7302275 |
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55 |
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Kidmose, E.; Ebeid, E.; Jacobsen, R. |
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A Framework for Predicting User Behavior from the Main Smart Meter Data. |
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2015 |
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IARIA Fourth International Conference on Smart Systems, Devices and Technologies (SMART 2015), Brussels, Belgium |
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UNIROMA1 @ davi @ |
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49 |
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| Author |
Mancini, T. |
| Title |
Now or Never: Negotiating Efficiently with Unknown or Untrusted Counterparts |
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2016 |
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Fundam. Inform. |
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149 |
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1-2 |
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61-100 |
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UNIROMA1 @ davi @ DBLP:journals/fuin/Mancini16 |
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62 |
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Mancini, T. |
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Now or Never: negotiating efficiently with unknown counterparts |
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2015 |
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In proceedings of the 22nd RCRA International Workshop. Ferrara, Italy. CEUR, 2015 (Co-located with the 14th Conference of the Italian Association for Artificial Intelligence (AI*IA 2015)). |
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UNIROMA1 @ davi @ |
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53 |
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Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. |
| Title |
SyLVaaS: System Level Formal Verification as a Service |
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2016 |
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Fundam. Inform. |
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149 |
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1-2 |
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101-132 |
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UNIROMA1 @ davi @ DBLP:journals/fuin/ManciniMMMT16 |
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63 |
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Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. |
| Title |
Anytime system level verification via parallel random exhaustive hardware in the loop simulation |
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2016 |
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Microprocessors and Microsystems |
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41 |
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12-28 |
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Model Checking of Hybrid Systems; Model checking driven simulation; Hardware in the loop simulation |
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Abstract System level verification of cyber-physical systems has the goal of verifying that the whole (i.e., software + hardware) system meets the given specifications. Model checkers for hybrid systems cannot handle system level verification of actual systems. Thus, Hardware In the Loop Simulation (HILS) is currently the main workhorse for system level verification. By using model checking driven exhaustive HILS, System Level Formal Verification (SLFV) can be effectively carried out for actual systems. We present a parallel random exhaustive HILS based model checker for hybrid systems that, by simulating all operational scenarios exactly once in a uniform random order, is able to provide, at any time during the verification process, an upper bound to the probability that the System Under Verification exhibits an error in a yet-to-be-simulated scenario (Omission Probability). We show effectiveness of the proposed approach by presenting experimental results on SLFV of the Inverted Pendulum on a Cart and the Fuel Control System examples in the Simulink distribution. To the best of our knowledge, no previously published model checker can exhaustively verify hybrid systems of such a size and provide at any time an upper bound to the Omission Probability. |
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0141-9331 |
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UNIROMA1 @ davi @ Mancini201612 |
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59 |
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| Author |
Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. |
| Title |
SyLVaaS: System Level Formal Verification as a Service |
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2015 |
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Proceedings of the 23rd Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP 2015), special session on Formal Approaches to Parallel and Distributed Systems (4PAD) |
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UNIROMA1 @ davi @ |
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47 |
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| Author |
Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. |
| Title |
Simulator Semantics for System Level Formal Verification |
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2015 |
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Proceedings Sixth International Symposium on Games, Automata, Logics and Formal Verification (GandALF 2015), |
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UNIROMA1 @ davi @ |
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54 |
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Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. |
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Anytime System Level Verification via Random Exhaustive Hardware In The Loop Simulation |
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2014 |
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In Proceedings of 17th EuroMicro Conference on Digital System Design (DSD 2014) |
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UNIROMA1 @ davi @ |
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44 |
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