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Hayes, B. P.; Gruber, J.K.; Prodanovic, M. |
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Short-term load forecasting at the local level using smart meter data |
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2015 |
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IEEE PES Europe Conference (PowerTech), Eindhoven, Netherlands |
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UNIROMA1 @ davi @ |
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51 |
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Mancini, T. |
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Now or Never: negotiating efficiently with unknown counterparts |
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2015 |
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In proceedings of the 22nd RCRA International Workshop. Ferrara, Italy. CEUR, 2015 (Co-located with the 14th Conference of the Italian Association for Artificial Intelligence (AI*IA 2015)). |
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UNIROMA1 @ davi @ |
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53 |
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Author |
Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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On-the-Fly Control Software Synthesis |
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2013 |
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Proc. of International SPIN Symposium on Model Checking of Software (SPIN 2013) |
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61-80 |
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Springer - Verlag |
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Lecture Notes in Computer Science |
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7976 |
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978-3-642-39175-0 |
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UNIROMA1 @ davi @ Alimguzhin_etal2013 |
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18 |
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Alimguzhin, Vadim; Mari, Federico; Melatti, Igor; Salvo, Ivano; Tronci, Enrico |
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A Map-Reduce Parallel Approach to Automatic Synthesis of Control Software |
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2013 |
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Proc. of International SPIN Symposium on Model Checking of Software (SPIN 2013) |
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43-60 |
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Springer - Verlag |
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Lecture Notes in Computer Science |
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7976 |
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978-3-642-39175-0 |
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UNIROMA1 @ davi @ Alimguzhin_etal2013_2 |
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19 |
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Author |
Mancini, T. |
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Title |
Now or Never: Negotiating Efficiently with Unknown or Untrusted Counterparts |
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2016 |
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Fundam. Inform. |
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149 |
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1-2 |
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61-100 |
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UNIROMA1 @ davi @ DBLP:journals/fuin/Mancini16 |
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62 |
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Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. |
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Title |
SyLVaaS: System Level Formal Verification as a Service |
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2016 |
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Fundam. Inform. |
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149 |
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1-2 |
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101-132 |
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UNIROMA1 @ davi @ DBLP:journals/fuin/ManciniMMMT16 |
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63 |
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Author |
Jacobsen, R.H.; Mikkelsen, S.A. |
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Title |
Infrastructure for Intelligent Automation Services in the Smart Grid |
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2014 |
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Wireless Personal Communications |
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76 |
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2 |
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125-147 |
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Home area network; Smart energy profile; Intelligent automation services; Smart grid |
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Springer US |
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0929-6212 |
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UNIROMA1 @ davi @ JacMik14 |
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41 |
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Author |
Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. |
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Title |
Anytime system level verification via parallel random exhaustive hardware in the loop simulation |
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2016 |
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Microprocessors and Microsystems |
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41 |
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12-28 |
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Model Checking of Hybrid Systems; Model checking driven simulation; Hardware in the loop simulation |
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Abstract System level verification of cyber-physical systems has the goal of verifying that the whole (i.e., software + hardware) system meets the given specifications. Model checkers for hybrid systems cannot handle system level verification of actual systems. Thus, Hardware In the Loop Simulation (HILS) is currently the main workhorse for system level verification. By using model checking driven exhaustive HILS, System Level Formal Verification (SLFV) can be effectively carried out for actual systems. We present a parallel random exhaustive HILS based model checker for hybrid systems that, by simulating all operational scenarios exactly once in a uniform random order, is able to provide, at any time during the verification process, an upper bound to the probability that the System Under Verification exhibits an error in a yet-to-be-simulated scenario (Omission Probability). We show effectiveness of the proposed approach by presenting experimental results on SLFV of the Inverted Pendulum on a Cart and the Fuel Control System examples in the Simulink distribution. To the best of our knowledge, no previously published model checker can exhaustively verify hybrid systems of such a size and provide at any time an upper bound to the Omission Probability. |
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0141-9331 |
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UNIROMA1 @ davi @ Mancini201612 |
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59 |
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Author |
Mancini, Toni; Mari, Federico; Massini, Annalisa; Melatti, Igor; Merli, Fabio; Tronci, Enrico |
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System Level Formal Verification via Model Checking Driven Simulation |
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2013 |
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Proceedings of the 25th International Conference on Computer Aided Verification (CAV 2013). July 13–19, 2013, Saint Petersburg, Russia |
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296-312 |
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Springer - Verlag |
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Lecture Notes in Computer Science |
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8044 |
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978-3-642-39798-1 |
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UNIROMA1 @ davi @ Mancini_etal2013 |
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21 |
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Author |
Mancini, T.; Mari, F.; Massini, A.; Melatti, I.; Tronci, E. |
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System Level Formal Verification via Distributed Multi-Core Hardware in the Loop Simulation |
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2014 |
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Proc. of the 22nd Euromicro International Conference on Parallel, Distributed and Network-Based Computing (PDP 2014) |
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IEEE Computer Society |
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UNIROMA1 @ davi @ Mancini_etal2014 |
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39 |
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